1. Field
Various embodiments of the present invention relate generally to a complementary metal oxide semiconductor (CMOS) image sensor and, more particularly, a CMOS image sensor (CIS) having a pixel power noise cancelling apparatus and a pixel power noise cancelling method.
2. Description of the Related Art
A CMOS image sensor (CIS) is widely used in various applications since it operates at lower supply voltages, consumes less electric power than a charge coupled device (CCD) and is more advantageous in circuit integration because of the use of the CMOS process. Unlike a CCD, a CIS requires an operation of converting an analog output signal by a pixel array, such as an active pixel sensor (APS), into a digital signal. Typically, a CIS includes an internal high resolution analog-to-digital converter (ADC) for converting the analog signal to the digital signal.
A CIS may be categorized into a CIS using a single ADC or a CIS using a column ADC. The CIS using the single ADC includes a single ADC to convert the analog output signal of all the columns of a pixel array into a digital signal at a predetermined time. The CIS using the single ADC type offers a reduced chip size, but consumes more power because of its higher operation speed.
On the other hand, the CIS using the column ADC includes a plurality of simpler ADCs each disposed at a respective column of the pixel array. The CIS using the column ADC has a disadvantage of having a larger chip size than the CIS using the single ADC. However, the CIS using the column ADC consumes less power because it operates at a lower speed than the CIS using the single ADC.
The CIS using the column ADC performs correlated double sampling (CDS) on the analog output signal from the pixel array, stores a correlated-double sampled signal, and compares the correlated-double sampled signal with a reference voltage (i.e., a ramp signal) from a ramp signal generator to provide a comparison result signal for generating a digital code.
Moreover, the CIS using the column ADC employs separate power supplies for the pixel array and the ramp signal generator, which may cause pixel power noise and signal distortion caused by the pixel power noise.
Meanwhile, consumer demand for higher resolution images has spurred CIS manufacturers to develop higher resolution CIS. Pixels in a high resolution CIS are generally smaller than those in a lower resolution CIS to allow employing more pixels while maintaining or even reducing the chip size of the CIS. However, as the pixel size is getting smaller, the pixel noise and the resultant signal distortion become more serious issues. Thus, mitigation or prevention of image deterioration caused by pixel power noise is needed.
A differential type comparator is typically included in a conventional column ADC and generally shows good noise reduction characteristics for a power noise generated in a CDS circuit itself and a coupling noise caused by a switching operation, but is generally not effective for mitigating the pixel power noise generated in the pixel array that is external to the CDS circuit.
Conventionally, for addressing the above problem, when a ramp signal is generated by a ramp signal generator and mirrored to a comparator, the ramp signal generator is fed with a supply voltage of the pixel array to generate the pixel power noise for itself and then the generated noise is introduced into the pixel signal so that the pixel power noise is cancelled in the comparator.
Such a method may suppress the pixel power noise only when the pixel power noise generated in the plurality of columns is uniform, i.e., has the same magnitude and phase for each column. However, the pixel power noise in the plurality of columns is random in its magnitude and phase and thus the pixel power noise is not effectively suppressed. To make matters worse, the conventional method of reducing the pixel power noise may amplify the signal distortion by the random pixel power noise caused by the ramp signal from the ramp signal generator and the pixel signal from the pixel array.
The conventional method of reducing the pixel power noise may reduce some of the pixel power noise when an average pixel power noise is intentionally generated and introduced into the pixel signal. However, even doing so does not eliminate the actual pixel power noise of the plurality of columns which may have different magnitude and phase depending on each column location.